Zeemz

LogicSim Release Notes

Zeemz's LogicSim product line release notes include updated information for the documentation provided with the LogicSim product line. The information contained in this document may be more up-to-date than the information that is provided in the documentation.

Also, please check out our to-do-list for feature requests scheduled for future releases.

LogicSim release notes are specific to each version of the application. Select your version from the list below to see the release notes for it:

LogicSim 3.3 Release Notes
Released on 30 Mar 2008.
Verilog: Fixed module instantiation port list, so that connecting a non-net variable to an output/inout port would generate an error.
SDF: Added support for interconnect delays annotation from SDF file.
SDF: Increased the length limit of cell instance name from 100 characters to 1000 characters.
SDF: Fixed SDF warning messages for checks/pulses/delays, so that SDF file name/line number are displayed instead of Verilog file name/line number. This enables locating the source of line that is causing the warning message in the SDF file.
SDF: Fixed bug where edge-sensitive specify path would fail to annotate the corresponding delay in SDF file when edge not specified.
SDF: Fixed bug where specify path without edge specified would fail to annotate the corresponding delay in SDF file that specifies an edge.
SDF: Fixed bug where setup/hold timing check would fail to annotate the corresponding delay in SDF file when SETUPHOLD is specified.
SDF: Fixed bug where recovery/removal timing check would fail to annotate the corresponding delay in SDF file when RECREM is specified.
SDF: Fixed bug where SDF cell with empty instance name would fail to resolve.
Waveform Viewer: Fixed bug where view would turn blank when finding next transition in a waveform file that contains only a single transition.
Waveform Viewer: Fixed bug where radix converting values containing x/z to octal values would yield to 0 instead of x/z.
Waveform Viewer: Fixed bug where radix converting values containing x/z to hexadecimal values would yield to 0 instead of x/z.
Waveform Viewer: Fixed bug where radix converting values containing x/z to unsigned/signed integer values would yield to 0 instead of x/z.
Workspace: Ported from Microsoft Foundation Classes 7.1 to 8.0.
Workspace: Enhanced look and feel for all tree controls, such as hierarchy navigator, object browser, waveform node pane, option tree, etc.
LogicSim 3.2 Release Notes
Released on 28 Nov 2007.
Verilog: Added exception handler to display an error message and exit gracefully when the system runs out of virtual memory during linking and simulation.
Verilog: Fixed bug where "disable" would fail to resolve deeply-nested identifiers and result in a crash under certain circumstances.
Verilog: Fixed bug where statement(s) belong to "wait" would fail to resolve and result in a crash under certain circumstances.
Code Editor: Fixed bug where changing editor background color would not change breakpoint/haltpoint bitmap background color to match the new color.
Waveform Viewer: Added support for auto-adjusting waveform track value when it goes out of sight during zooming.
Waveform Viewer: Fixed waveform track value, so that text is always displayed as left-aligned instead of center-aligned.
Workspace: Added "File->Recent Projects" to display shortcuts to a list of recently opened projects.
Workspace: Fixed bug where message pane would fail to respond to Ctrl+C shortcut key when document window was open.
LogicSim 3.1 Release Notes
Released on 26 Jul 2007.
Verilog: Reduced simulation loading time.
Verilog: Reduced memory consumption for very big memory arrays significantly. Use dynamic memory allocation technique as opposed to static memory previously, whereby the latter would result in a crash when the system ran out of virtual memory.
Verilog: Fixed memory leak in Verilog parser.
Verilog: Fixed inout port, so that it will not drive connection to tri nets with multiple drivers. This is to prevent cyclic dependencies exist in tri nets where one of it's driver is an inout port.
Verilog: Fixed bug where omitting optional threshold parameter in $width timing check would result in a crash.
Verilog: Fixed bug where having two consecutive index and slice assignments of different bits on the same variable would cause the variable in event sensitivity list not to be evaluated under certain circumstances.
Code Editor: Fixed bug where setting breakpoints on single-line statements nested in "for loop", "if", "case item", "while loop" and so on would not cause simulation to pause when breakpoint condition was met.
Code Editor: Fixed bug where "Find" would occasionally match find string to white spaces.
Waveform Viewer: Fixed bug where view would fail to scroll and update while simulation was paused.
Waveform Viewer: Fixed bug where ascending sorting of signals wasn't working properly.
Workspace: Added support for creating sub-folders in file navigator to improve navigation for projects with many files.
Workspace: Added support for removing multiple items in file navigator instead of one by one previously.
Workspace: Added message dialog box to indicate waveform file is read-only while trying to add waveform signals when simulation is paused.
Workspace: Added "File->Close File" menu item to close an open document.
Workspace: Changed project file to use XML as the specification format.
Workspace: Removed "Remove All Files" menu item, as it is redundant and has been replace with multi-remove now.
Workspace: Fixed bug where ending simulation after pausing would make open waveform file unwrittable.
Workspace: Fixed bug where breakpoints would not be removed from simulation if removing breakpoints from breakpoint manager while simulation was paused.
Workspace: Fixed bug where file open dialog would fail when selecting too many files.
LogicSim 3.0 Release Notes
Released on 13 Jun 2007.
API: Redesigned names of API functions to make them more human readable.
Verilog: Added support for 64-bit simulation time from 32-bit previously.
Verilog: Fixed real data type, so that unknown and high impendance will not be valid real values.
Verilog: Fixed module instantiation port list, so that connecting to a non-existing port will return an error instead of being ignored.
Verilog: Fixed bug where connecting a net to a non-port variable in a module instantiation port list would result in a crash. It will now issue a linking error when such a connection exists.
Code Editor: Fixed bug where setting breakpoints inside function/task body would result in an internal error.
Code Editor: Fixed bug where break-able lines failed to refresh when load simulation completed while source code window was open.
Waveform Viewer: Added support for moving signals around with Drag & Drop.
Waveform Viewer: Added support for cutting and pasting signals using context menu, as well as Ctrl+C and Ctrl+V.
Waveform Viewer: Added support for multi-select radix conversion, instead of only a single signal could be converted at one time previously.
Waveform Viewer: Added support for sorting signals by node name in ascending/desceding order.
Waveform Viewer: Added gray dotted ruler to time legend tick, providing better time track visibility.
Waveform Viewer: Removed screen flicker from node pane when clicking and finding transition.
Waveform Viewer: Fixed bug where simulation run longer than 32-bit simulation time would not display correctly.
Waveform Viewer: Fixed bug where radix conversion to signed/unsigned integer larger than 32-bit would not work properly.
Waveform Viewer: Fixed bug where time dialog would always set to "ps" time unit when used the first time, regardless the current simulation time unit.
Waveform Viewer: Fixed bug where shortcut keys would work when waveform was initially loaded. The user had to manually click on the waveform view before shortcut keys started working.
Waveform Viewer: Fixed bug where multi-selection would be reset when node pane was scrolled beyond view.
Waveform Viewer: Fixed bug where zooming in/zooming out and returning back to zoom level 1 would result in mysterious bug due to unreset internal states.
Waveform Viewer: Fixed bug where removing multiple signals would sometimes cause node pane to fail to update correctly.
Waveform Viewer: Fixed bug where having different states of horizontal scrollbars on node pane and waveform view would cause node/track going out of synchronization when scrolling reached the end.
Waveform Viewer: Fixed bug where selecting a partially visible node would auto-scroll the node pane but not the waveform view, resulting in node/track going out of synchronization.
Waveform Viewer: Fixed duplicate signals residing in separate waveform files, so that they will be displayed in all waveform files instead of just one.
Waveform Viewer: Fixed time type, so that value will be displayed as integer instead of binary by default.
Workspace: Added support for displaying progress of simulation time in status bar for designs with long simulation time.
Workspace: Added support for pausing simulation while simulation is running.
Workspace: Added support for refreshing and displaying partial waveform upon simulation pause.
Workspace: Added keyboard shortcuts for "Save File" and "Save All Files".
Workspace: Fixed bug where opening a waveform file while simulation was paused would trigger a file sharing violation.
Workspace: Fixed bug where ending simulation while simulation was paused would put workspace in an unstable state.
Workspace: Fixed bug where simulation would pause at a previously removed breakpoint during continuous re-simulation.
Workspace: Updated stock icons.
LogicSim 2.4 Release Notes
Released on 6 May 2007.
Verilog: Added support for specparam PATHPULSE$.
Verilog: Fixed bug where performing SDF timing simulation would result in a crash. The crash only happenned occasionally and was very difficult to reproduce consistently, as it was caused by illegal reference to deleted memory region.
Verilog: Fixed bug where the use of array of module instances in certain ways would result in a crash.
Verilog: Fixed bug where UDP contains more than 8 states would fail.
Verilog: Fixed bug where '_' numeric scan string wasn't working for $fscanf and $sscanf.
Verilog: Fixed bug where %o octal format specifier wasn't working for $fscanf and $sscanf.
Verilog: Fixed bug where inout port would fail to update when used as index expression or slice expression during output mode.
Verilog: Fixed bug, so that parameters will be resolved first before array of module instances.
SDF: Added support for specparam PATHPULSE$ delay annotation via PATHPULSE.
SDF: Added support for $recrem delay annotation via RECOVERY and REMOVAL, which previously delays could only be annotated via RECREM itself.
SDF: Fixed bug where SDF token was not recognized when not separated by white space.
SDF: Fixed bug where SDF terminal failed to parse under certain circumstances.
Code Editor: Added support for copying highlighted text to the find dialog box for convenience.
Code Editor: Fixed bug where pressing Ctrl+Shift+Left would not highlight selection on second block.
Waveform Viewer: Fixed transition finder, so that time bar will be adjusted to new position when goes out of sight.
Waveform Viewer: Fixed time locate dialog, so that time bar will be adjusted to new position when goes out of sight.
Waveform Viewer: Fixed time locate dialog, so that error will be displayed when out of range time value is entered.
Waveform Viewer: Fixed bug where opening waveform files that contain invalid parameters would result in a crash.
Workspace: Added support for sorting in "Hierarchy" pane and "Files" pane.
Workspace: Added *.vh as a new Verilog file extension.
Workspace: Added *.* file extension filter in "Open File" dialog box.
Workspace: Fixed a critical bug where loading simulation while opening more than 1 Verilog source code file would sometimes result in a crash.
LogicSim 2.3 Release Notes
Released on 11 Apr 2007.
Verilog: Fixed bug where the use of more connecting ports than connected ports in a module instantiation would result in a crash. A warning message will be issued now.
Waveform Viewer: Improved waveform viewer drawing performance significantly, most notably on large waveform files.
Waveform Viewer: Added support for multi-select removal in node pane.
Waveform Viewer: Fixed bug where horizontal thumb-scrolling of waveforms with long simulation time that exceeded 16-bit tracking position would not work correctly. Increased tracking position storage from 16-bit to 32-bit.
Waveform Viewer: Fixed bug where scalar signal would not be displayed correctly when zoom-in level reached certain depth.
Workspace: Added object pane for displaying signals of selected instance from the hierarchy pane.
Workspace: Added support for dumping signals to the waveform viewer from the object pane.
Workspace: Added support for multi-select deletion in breakpoint pane.
Workspace: Fixed bug where sequence of simulation messages were not in correct order.
Workspace: Fixed bug where clicking on non-locatable error messages would result in a crash.
LogicSim 2.2 Release Notes
Released on 1 Apr 2007.
Code Editor: Added "Tab Size" preference option to "Tools->Options->Code Editor".
Code Editor: Added "Auto-Indent" preference option to "Tools->Options->Code Editor".
Code Editor: Added "Text Font " preference option to "Tools->Options->Code Editor".
Waveform Viewer: Improved waveform viewer drawing performance significantly, most notably on large waveform files.
Waveform Viewer: Added right-arrow/left-arrow keyboard shorcuts for next transition/previous transition respectively.
Waveform Viewer: Added up-arrow/down-arrow keyboard shorcuts for scroll up/scroll down respectively.
Waveform Viewer: Added +/- keyboard shorcuts for zoom in/zoom out respectively.
Waveform Viewer: Added support for scrolling up/scrolling down with mouse wheel.
Waveform Viewer: Added "Scope Separator" preference option to "Tools->Options->Waveform Viewer".
Waveform Viewer: Fixed time legend, so that time values will always be in multiple of 10 instead of 8 previously.
Waveform Viewer: Fixed time legend, so that time values will always scale according to the current zoom level instead of stuck at zoom level 1 previously.
Waveform Viewer: Fixed bug where scroll bars didn't not when left clicking in horizontal or vertical scroll bar between position icon and corresponding arrow icon.
Workspace: Added "File->Recent Files" to display shortcuts to a list of recently opened files.
Workspace: Fixed document title, so that asterisk "*" will be appended to the title of modified documents.
Workspace: Fixed "Options" dialog, so that the selected grid will be highlighted on the left-hand side tree.
Workspace: Fixed "Options" dialog, so that the previous selected grid will be preserved.
LogicSim 2.1 Release Notes
Released on 8 Mar 2007.
Verilog: Enhanced port net initialization algorithm, so that connected/unconnected port nets can be modeled more accurately.
Verilog: Changed timing check violation notification delta time priority to inactive callback instead of active item.
Verilog: Disabled timing check processing for $setup, $hold and $setuphold when timestamp/timecheck is simulation time 0.
Verilog: Padded leading 0's to concatenation on the left-hand side of an assignment when right-hand side value is smaller.
Verilog: Fixed edge-sensitive specify path, so that module path delays will be applied regardless of condition at simulation time 0.
Verilog: Fixed bug where inout port would triggered a recursive port connect update when operating in output mode.
Verilog: Fixed bug where displaying binary string or ASCII string that contains more than 1000 characters from an identifier would result in a crash.
Verilog: Fixed bug where triggering blocked sequential/parallel block while delay control of blocking assignment wasn't realized yet would result in immediate realization.
Verilog: Fixed bug where assigning HiZ to tri1 vector would pull to 1 instead of all 1's.
Verilog: Fixed bug where the use of implicit net concatenation on the left-hand side of a continuous assignment would result in a crash.
Code Editor: Enhanced "Find whole words only" text searching, so that word boundary excludes all non-alphanumeric characters instead of just whitespaces previously.
Code Editor: Fixed bug where finding text under selection would select the same text on first attempt.
Code Editor: Fixed bug where locating an un-open document would see unexpected right-scrolling.
Waveform Viewer: Added support for node divider insertion, feature is available from right-click on selected node "Insert Divider".
Waveform Viewer: Added support for non-persistent name level customization for individual waveform window, feature is available from "Waveform->Name Level" menu.
Waveform Viewer: Added support for saving waveform persistent states, so that time bar, zoom level, vertical/horizontal scroll positions and name level will remain the same during the next load.
Waveform Viewer: Added tick mark to radix context menu to indicate current selected radix.
Waveform Viewer: Changed node font type from "Courier New" to "MS Sans Serif" for better visual experience, and also added node row header.
Waveform Viewer: Changed rendition of 1-bit vector as scalar signal instead of 1-bit vector signal.
Waveform Viewer: Fixed bug where node pane would perform unexpected scrolling when keyboard scrolling was used.
Waveform Viewer: Fixed bug where cancelling waveform saving upon "Run Simulation" would not cancel the process.
Waveform Viewer: Fixed bug where dumping signal that contains more than 1000 bits would result in a crash.
Workspace: Added "Open File" shortcut button to the workspace main toolbar for faster and direct file opening.
Workspace: Added "Add File" shortcut button to the workspace hierarchy pane toolbar for faster and direct file adding.
Workspace: Added support for "Error" and "Warning" message highlight in message pane. Error message will be displayed in red and warning as cyan now.
Workspace: Added basic license info checking before generate license file, as too many users accidentally generated an invalid license file.
Workspace: Fixed file dialog default path, so that "Add, Open or Save" will point to the project path after "New Project" instead of user's document path.
Workspace: Fixed bug where "lsim.exe" would crash when loading project created at "C:\Documents and Settings\" due to internal file name conflict.
LogicSim 2.0 Release Notes
Released on 12 Feb 2007.
Verilog: Added support for event identifier declaration in block-level scope.
Verilog: Added support for cmos, rcmos, rtran, rtranif0, rtranif1, tranif0 and tranif1 gate primitives.
Verilog: Added support for event control and repeat event in non-blocking assignments.
Verilog: Added support for repeat event in blocking assignments.
Verilog: Added support for conditioned events in timing checks, e.g. $hold, $setup, $setuphold, and so on.
Verilog: Enhanced port net initialization algorithm, so that connected/unconnected port nets can be modeled more accurately.
Verilog: Fixed repeat statement, so that the repeat condition will be late-bound evaluation instead of static constant evaluation.
Verilog: Fixed module path in specify block, so that the smallest delay value will be chosen if more than one active module paths are found.
Verilog: Fixed defparam precedence, so that it will have the highest precedence and will override all other parameter redefinitions.
Verilog: Fixed division by 0, so that it will return unknown value instead of ignoring the division operation.
Verilog: Fixed modulus by 0, so that it will return unknown value instead of ignoring the modulus operation.
Verilog: Fixed $finish to stop simulation immediately without flushing pending strobe and monitor events.
Verilog: Fixed common event control chain, so that it's created as circular linked-listed instead of top-down sequential linked-list.
Verilog: Fixed inout port, so that high impedance will not be assigned to the output port when operating in input mode.
Verilog: Fixed inout port, so that wire update will not be propagated to to parent's event chain when operating in output mode.
Verilog: Fixed defparam failure to resolve parameter when hierarchical instance name is deeper than 2 levels.
Verilog: Fixed bug where the assignment of a real value to an uninitialize integer identifier would not reset its unknown state.
Verilog: Fixed bug where a negative real value wasn't correctly rounded when assigned to an integer identifier.
Verilog: Fixed bug where the use of indexed expression on the in/out terminals of a specify path would result in a crash.
Verilog: Fixed bug where the use of the same name between module and gate instantiation would result in a crash.
Verilog: Fixed bug where two functions recursively calling each other would result in a crash during linking.
Verilog: Fixed bug where event control would not trigger when non-identifier expression such as binary expression was used on a "no edge" event expression.
Verilog: Fixed bug where assign/deassign would not work as expected under certain circumstances, such as a D-type flip-flop with preset and clear inputs.
Verilog: Fixed bug where finite state machine would not work properly when nested event controls were used.
SDF: Added support for $setuphold delay annotation via SETUP and HOLD, which previously delays could only be annotated via SETUPHOLD itself.
SDF: Fixed bug where the use of timescale greater than "1 ps" would override the static Verilog timescale precision offset, which would result in wrong delay values.
SDF: Fixed bug where annotation would fail when module instance name contain full stop "." preceeded with escape character "/".
Waveform Viewer: Fixed bug where signal name containing full stop "." character will not be processed properly as "." was also a hierarchy separator.
Waveform Viewer: Fixed bug where node pane would perform unexpected scrolling when mouse wheel scrolling was used.
Waveform Viewer: Replaced hierarchy separator of signal name from full stop "." to forward slash "/" to avoid confusion as the former can be used as a valid signal name in Verilog.
Waveform Viewer: Removed screen flicker from node pane when scrolling.
Workspace: Added drag & drop support for opening LogicSim documents such as waveform files and source code files from external environment such as Windows Explorer.
Workspace: Added editing buttons to the toolbar in full-screen mode.
Workspace: Added support for opening a project while one is already open, will ask for confirmation to close current open project before opening a new one.
Workspace: Added LogicSim installation path to the PATH environment variable upon successful installation.
Workspace: Fixed broken link in "Release Notes" menu item.
Workspace: Fixed bug where Ctrl+C was not working on message pane when it was supposed to copy text from the message pane to the clipboard.
Sample: Added "Altera Cyclone PLL Timing Simulation" sample.
Sample: Added "Opencores YACC RTL Simulation" sample.
Sample: Added "Xilinx Gate-Level Timing Simulation" sample.
LogicSim 1.1 Release Notes
Released on 25 Jan 2007.
Verilog: Fixed bug where the use of blocking assignment event control "@" in an always block could trigger an infinite loop when the blocking assignment is the last statement of the sequential block.
LogicSim 1.0 Release Notes
Released on 10 Jan 2007. This is the first commercial release of LogicSim.
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